PolteRGeisT
10-25-2005, 10:06 PM
This is a problem from a midterm from last year in a computer design course and I've attacked it every way I know how, only to come up just short of the solution every time:
Construct a 3-input NAND gate using only three 2-input NAND gates.
My two best solutions thus far require either 4 NAND gates, or 3 NAND gates + 1 NOT gate. :mad:
Construct a 3-input NAND gate using only three 2-input NAND gates.
My two best solutions thus far require either 4 NAND gates, or 3 NAND gates + 1 NOT gate. :mad: