CaptainPinko
09-22-2005, 10:54 PM
I was doing some homework for basic circuit and microporcessor design and a thought can to me.... isn't multi-core chips more favourable since x86 has to decode each instruction while as 'true' (AFAIK that would be one with no microarchitecture as I believe SPARC is) to benefit since they can keep adding cores without having more decoders... or can multiple cores share the same decorder? Unfortunately in terms of performance the memory divide still gives x86 an advantage since cycles are cheap while memory latency isn't; but it should come in handy for RISC in production since it'd can have higher yields due to a lower transistor count... but then again higher volume allows x86 makers to defray costs better. Hmm. Just some thoughts.